Intel Corp. and Apple Inc. have partnered with TSMC Co. Ltd. to make new chips using its upcoming three-nanometer semiconductor manufacturing process, according to a new report.

Nikkei Asia reported today that the two companies are not merely set to use the three-nanometer process but will also be in its first adopters. This means that Intel and Apple could be among the very first to market with chips made using the cutting-edge manufacturing technology. Such chips are expected to be faster and more power-efficient than silicon made with current technology.

Taiwan-based TSMC is the world’s largest chip manufacturer. TSMC’s upcoming three-nanometer process will make it possible to produce smaller transistors than those found in the most sophisticated chips found on the market today, which use a five-nanometer process. Smaller transistors improve computing speeds because, thanks to their compact size, more of them can fit on a processor’s surface. The additional transistors allow the processor to perform a higher number of calculations per second. 

Last year, TSMC estimated that chips based on its three-nanometer technology will provide up to 15% more performance than their five-nanometer predecessors using the same amount of power. Alternatively, they will be capable of providing the same performance while using between 25% to 30% less electricity.

Sources told Nikkei Asia that Intel and Apple are already testing new chip designs with TSMC’s three-nanometer process. The sources believe that Apple’s iPad will be the first device to ship with a three-nanometer processor made by the chip manufacturer. 

For its part, Intel is said to be working on not only but two separate three-nanometer chip projects with TSMC. One project reportedly involves making notebook processors, while the other focuses on data center chips.

Another key detail revealed by the sources is that the number of processors Intel plans to make using TSMC’s three-nanometer production line is expected to exceed the volume of iPad chips. Specific figures were not shared. In response to the report, an Intel spokesperson confirmed that TSMC is helping the company with its 2023 chip lineup but didn’t comment on the details.

Intel’s partnership with TSMC received widespread industry attention when it was announced last year because the companies compete with one another in the chip manufacturing segment. Apple, in contrast, only designs processors but doesn’t manufacture and therefore isn’t a TSMC competitor. 

Intel’s decision to have some products fabricated by its rival was driven by setbacks in its own in-house chip fabrication infrastructure. Because of delays in upgrading to new manufacturing technologies, Intel makes its newest central processing units using a 10-nanometer process while TSCM already produces large numbers of chips using the newer five-nanometer process. Because the size of transistors directly influences processors’ speed, Intel’s manufacturing setbacks have hurt its market position. 

Rival CPU maker Advanced Micro Devices Inc. has managed to win significant market share from Intel over the last few years. In the notebook market, AMD grew its share of CPU sales from 11% in 2019 to more than 20% last year. The company is also expanding its presence in the data center.

The report that Intel and Apple will be among the very first adopters of TSMC’s three-nanometer process is significant, among other reasons, because it may alter the competitive dynamics of the CPU market. AMD currently uses TSMC’s seven-nanometer process to make its CPUs. If Intel, as an early adopter of TSCM’s three-nanometer process, manages to bring three-nanometer chips to market sooner than AMD, it could gain a transistor advantage. The smaller transistors may make it easier for Intel’s engineers to surpass the performance and efficiency of AMD products.

However, it’s not yet clear whether the two initial two three-nanometer projects Intel is reportedly pursuing with TSMC will focus on making CPUs or another kind of chip. TSMC is expected to begin mass-producing three-nanometer chips as early as the end of 2022. 

The company has stated that its three-nanometer process will continue to use the so-called FinFET architecture that is used in most current chips. A transistor represents ones and zeros using electrons, which it manipulates to perform calculations using a microscopic component known as a gate. In the FinFET architecture, the gate resembles a fin, hence the name.

FinFET was developed because the original two-dimensional design that transistors used until a few decades ago had reached its limit. As transistors shrunk, maintaining an acceptable level of processing efficiency required engineers to improve the sophistication with which a transistor’s gate could manipulate the electrons inside.

Traditional two-dimensional designs limited engineers’ ability to do so. The FinFET architecture solved the issue by turning the gate into a three-dimensional structure, the so-called fin, that partly covers the transistor and can control the electrons inside in a more fine-grained way.

The fin is usually located atop a transistor. Samsung Electronics Co. Ltd., which is also developing a three-nanometer chip manufacturing process, has taken a different approach with its efforts. In Samsung’s three-nanometer process, the gate will be implemented not as a fin atop the transistor but rather as a kind of case covering the transistor from all directions.

Image: Apple