Custom silicon startup Ventana Micro Systems Inc. is emerging from stealth mode today and it’s armed with a fair bit of cash after raising $38 million in a new round of funding.

The Series B round was led by Sehat Sutardja and Weoli Dai, founders of the prominent U.S. chipmaker Marvell Technology Inc., together with Wise Road Capital, bringing its total amount raised so far to $53 million.

Ventana has built a series of customizable central processing units based on the RISC-V instruction set that it says are designed to optimize performance for cloud workloads. The chips have been designed to be highly portable across process nodes, the startup says.

Ventana’s choice of the open-source RISC-V instruction set architecture stands out. The instruction set architecture is a kind of blueprint that describes what computing operations the transistors on the chip can perform. The computing operations detailed in the instruction set architecture are the basic building blocks of software.

Most companies opt to license a proprietary instruction set from Arm Ltd. or Mips International Inc., which charge royalties for their technology. But RISC-V is free of charge thanks to its open-source nature.

The nonprofit industry group that maintains RISC-V promises several advantages over proprietary alternatives. The group says the architecture’s open-source license gives chip engineers more flexibility to customize the technology for a project’s requirements. Moreover, the increased customizability can also allow the software developers writing the applications that will run on the chip to play a bigger role in the silicon design process.

Ventana executives told SiliconANGLE in an email they chose to use the RISC-V architecture because it gives it the freedom to innovate at an accelerated rate.

“Rather than being beholden to license a proprietary ISA, we can drive innovation though the open RISC-V community to move the industry quickly forward,” the company explained. “We are working to make the process much like mix and matching lego blocks, where customers can assemble the blocks to create desired solutions, leveraging blocks from several partners or even their own customer blocks. Additionally, using RISC-V saves tens of millions of dollars in architecture license fees.”

Ventana added that it has played an active role in the RISC-V ecosystem over the years while it has been operating in stealth, including assisting with the roll-out of RISC-V International’s Fast Track Architecture Extension Process that streamlines the ratification of small architecture extensions

The company hasn’t revealed much about the exact specifications or capabilities of its RISC-V-based CPUs, but it told SiliconANGLE they will be a “huge leap forward” in terms of performance, customizability and development time.

The customizability of its CPUs and the extensibility of the RISC-V architecture allows companies to add their unique differentiation, the company said. Also, Ventana’s chiplet-based product strategy enables customers to develop solutions quickly, it added, saving up to two years’ development time.

Constellation Research Inc. analyst Holger Mueller told SiliconANGLE that Ventana is racing to build a next-generation compute architecture for the cloud and that the opportunity it’s chasing is tangible.

“The current cloud compute load runs predominantly on traditional central processing unit architectures, so it makes sense for startups to try to grab some of that business with more efficient chips,” Mueller said. “RISC-V architectures have shown they excel at efficient compute load operations, so it’ll be interesting to see what Ventana has to offer.”

Ventana co-founder, Chairman and Chief Executive Balaji Baktha agreed that the opportunity is real. In a statement, he said industry trends show that almost half of all compute spend is moving way from general-purpose processors in favor of infrastructure compute and domain specific processors.

“Ventana is perfectly positioned to capitalize on this trend with our high-performance ores built on the extensible RISC-V architecture, and our chiplet productization approach,” Baktha said.

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