Intel Corp. has begun issuing samples of its eagerly anticipated Stratix 10 programmable chips to customers, which are designed for use as accelerators in data center environments that specialize in fast compute- and data-intensive workloads.

Dan McNamara, corporate vice president and general manager of Intel’s Programmable Solutions Group, said in a blog post that the company was able to build a field-programmable gate array by combining its 14-nanometer tri-gate manufacturing process with its HyperFlex fabric architecture. The design is aimed at meeting the growing demand for higher-performing and more power efficient chips in order to manage the wave of new connected devices and growing amounts of data being produced.

As such, Intel’s Stratix 10 FGPAs are optimized for data center, cloud computing, radar and imaging, and network infrastructure workloads, McNamara said.

“We live in a smart and connected world where billions of devices are creating massive amounts of data that must be collected, rapidly processed and analyzed, and available from anywhere,” he wrote. That reality has compelled Intel to design the Stratix 10 in order to enable “service providers, data centers, cloud computing and storage systems to satisfy their insatiable demand for higher computational capabilities, lower latency, greater system flexibility and increased power efficiencies.”

Intel claims that Stratix 10 delivers twice the performance with five times as much density as its previous generation FPGAs, along with a 70 percent power efficiency boost. The FPGAs are powered by a quad-core 64-bit ARM Cortex-A53 processor, and offer up to 10 teraflops of single-precision floating point performance and a maximum one terabyte of memory bandwidth that comes with integrated High-Bandwidth Memory.

Accelerators such as Intel’s FPGAs provide considerable benefits to organizations because they’re able to help speed up the performance of large-scale environments while keeping power consumption to acceptable levels. Intel’s x86 Xeon Phi processors and NVIDIA Corp.’s and Advanced Micro Devices Inc.’s Graphics Processing Units are other popular accelerators, and have seen a lot of use in high-performance computing and supercomputing environments.

But with the rise of cloud computing and Internet of Things devices, and the accompanying data they produce, accelerators are quickly becoming much more popular in the server room too. As such, Intel reckons that its FPGAs could be deployed in as many as 30 percent of the world’s data center servers by 2020.

Intel shipped out its first Xeon chips with Arria 10 FPGA accelerators earlier this year, having acquired the Stratix FPGA technology following its $16.7 billion acquisition of Altera Corp. last year. Altera, along with Xilinx Inc., was the primary developer of FPGAs, which come with the significant benefit of being able to be reprogrammed for specific workloads. Intel’s next step will be to boost its accelerator options through a collaboration with eASIC that will see it offer application-specific integrated circuits (ASICs) for customized Xeon chips in areas like data analytics and cyber security.

Of course, Intel will inevitable face competition in this area. Xilinx, which so far hasn’t been acquired, has teamed up with some of Intel’s biggest rivals. They include Qualcomm Inc., which is developing ARM-based systems-on-a-chip (SoCs) for servers, and IBM, which uses Xilinx’s FPGAs to accelerate its Power systems for data analytics, machine learning, network-functions virtualization (NFV) and HPC workloads.

Image via Intel