Intel Corp. today unveiled three-dimensional processors that use a technology called Foveros to stack components atop one another in vertical layers, an approach the chipmaker says improves efficiency and reduces power requirements.

The processor series has been codenamed “Lakefield” by Intel. On launch, the line includes two systems-on-chip that target lightweight consumer devices such as dual-screen handsets, notebooks and tablets. 

The two Lakefield chips both have five processing cores. Four of those are low-power Atom Tremont cores that are responsible for running background tasks. The fifth core, which is based on Intel’s newest 10-nanometer Sunny Cove architecture, powers foreground applications. The cores sit atop one another in two stacked layers, while a third layer contains DRAM memory.

The design provides what Intel touts as an up to 56% reduction in chip package size. That’s a major boon for the lightweight devices Lakefield targets, which have to provide a thin form factor. Power efficiency is another priority in such devices that Intel is addressing as well: The chipmaker says the processors offer up to 24% better “performance per SOC” for web browsing.

The dime-sized Lakefield chips pack several new technologies. The component stacking is made possible by Foveros, a technology first unveiled last year, that allows Intel to connect multiple chip dies using tiny “microbumps.” Wires called through-silicon vias transport electricity to the different chip layers.

Intel has big ambitions for its stacked chip architecture. When Foveros originally debuted in 2018, the company shared plans to use the technology to make processors not only for consumer devices but also for data centers. 

Intel is developing several improvements for Foveros as part of its efforts to broaden its use. Ramune Nagisetty, a director of process and product integration at the company, said in an interview this year that one priority is working with suppliers on a faster way to transfer data to and from the onboard chip DRAM. Intel Fellow Johanna Swan, in turn, has stated the chipmaker is working to shrink the microbumps that connect the different layers with the eventual goal of removing them altogether.

Chip stacking isn’t the only new technology in Lakefield. The ability of the two Lakefield processors unveiled today to combine different core types, Tremont and Sunny Cove, is the fruit of a modular “chiplet” design Intel had previously announced. In the interview this year, Intel’s Nagisetty said that she was looking at the idea of building chips that combine components from multiple companies.

For now, Intel has teamed up with an initial group of hardware makers to bring Lakefield to market in consumer devices. Samsung Electronics Co. Ltd. will use the chips in the Galaxy Book S laptop it will launch this month. Microsoft Corp. and Lenovo Group Ltd. will follow suit further down the road with a pair of foldable Windows devices, the ThinkPad X1 Fold and Surface Neo.

The two Lakefield processors are known as the Core i5-L16G7 and the Core i3-L13G4. The former offers a 1.4-gigahertz base frequency that goes up to a maximum of 3.0GHz in single-core mode, while the Core i3-L13G4 has a 0.8GHz base frequency that can reach 2.8GHz.

Photo: Intel