The semiconductor industry is entering a new era defined by rapid advancements in artificial intelligence infrastructure, marking the rise of AI-era silicon. Companies across the value chain are transforming their development and production models to keep pace with the complexity and scale of next-generation computing.

Such topics were in focus during theCUBE + NYSE Wired: GSA Series – Women in Leadership interview series, which spotlighted the trailblazers steering the next wave of AI-era silicon.These interviews underscore the women leading today’s AI infrastructure push, according to theCUBE Research’s John Furrier.

TheCUBE’s John Furrier and Cisco’s Leslie Averbeck – one of the key figures leading the semiconductor revolution – talk about AI-era silicon.

“[These are] the leaders in AI infrastructure who are building the chips, the systems, the software that’s powering the large-scale AI build-out that’s happening,” Furrier said.

TheCUBE + NYSE Wired explored practical leadership playbooks within the Global Semiconductor Alliance ecosystem as part of theCUBE + NYSE Wired: GSA Series – Women in Leadership, with insights from Microsoft Corp., Cisco Systems Inc., Nvidia Corp. and more. TheCUBE’s conversations revealed how leaders are steering the next wave of AI-era silicon.

1. The next semiconductor revolution in AI-era silicon

The design process is evolving around two distinct paradigms, marking the next semiconductor revolution in AI-era silicon. The first builds on what’s already well understood, where agentic workflows are transforming rule-based automation into more intelligent, data-driven decision-making, according to Mamta Bansal (pictured, left), senior director of solutions engineering at Arm Limited.

“That is one aspect. But there’s one more unexplored aspect. Silicon design is an NP-hard problem,” Bansal said. “It’s a multivariate problem. We will look forward to AI to solve that. So I feel the day we break down the NP-hard problems, it’ll be immense, and that’s hopefully not very far away.”

The industry has transformed dramatically from its early days, when engineers manually placed transistors to design chips. Today, companies recognize AI as the next major force driving innovation and automation in semiconductor design, according to Hao Ji (pictured), vice president of research and development at Cadence Design Systems Inc.

“The entire [exploratory data analysis] industry started by automation, by enabling people to do their things faster and more efficiently,” Ji said. “We start with a manual layout, then become an automation layout, [then] automated verification, to verifying the chip is going to work. And I think AI is going to bring the next level of automation.”

Don’t miss the full interview from theCUBE.

2. An effort to build confidence in quality and supply

Quality and testing are under intense pressure as the technology market reaches unprecedented demand levels. The shift in quality and next-generation products is reshaping how the industry approaches system design, according to Leslie Averbeck, director of quality at Cisco Systems Inc.

Cisco’s Leslie Averbeck and GlobalFoundries’ Sarah McGowan talk with theCUBE.

“Cisco is very unique in that we have the full stack,” Averbeck said. “With the Silicon One launch of [application-specific integrated circuits] and integrating those into our next generation of AI products, we really have a unique opportunity to really help respond to the market and be at the forefront of a lot of these new build-outs.”

Volume ramp confidence has become critical as customers increasingly demand clear visibility into supply schedules. GlobalFoundries Inc. focuses heavily on ensuring designs are correct the first time, helping clients complete qualification quickly, according to Sarah McGowan, senior director of testchip and techfile engineering at GlobalFoundries.

“We’re spending a lot of time upfront in creating the design collateral that mimics the silicon exactly. And they can have confidence in their design that when it hits the silicon, it’s going to work right,” McGowan said.

Watch the full interview from theCUBE.

3. Thoughts on hardware and software in sync

The pace of innovation is accelerating rapidly, driven by advances in both hardware and the software powering it. Success depends on carefully balancing these forces, making smart investment decisions to keep up, according to Sharon Clay, vice president of hardware infrastructure at Nvidia Corp.

“The first thing is to have real clarity on the growth of demand and how to meet it. And so first, we’ve built in-house models to help us to predict the exact compute cycles required for certain kinds of deliverables and goals,” Clay said.

Cloud computing has evolved from the software-as-a-service era into a new phase powered by AI-era silicon. As technology moves from silicon to platforms, every hardware and software layer must integrate seamlessly to function as a unified system, according to Danielle Shown, general manager of silicon cloud hardware and infrastructure engineering at Microsoft Corp.

“We have to co-optimize at every layer of the stack. We can’t achieve customer value at scale by simply focusing on one area of the stack,” Shown said.

A key question is the importance of the software-hardware relationship. For students or career changers, understanding how software and hardware depend on each other is essential to grasp how modern technology actually works.

“What I see over at Meta is that by doing hardware and software co-design, we’re able to really optimize every aspects of our silicon so that we can optimize both instruction sets,” said Olivia Wu, technical lead for infra silicon at Meta Platforms, Inc. “How the jobs is going to get dispatched, the whole memory subsystem, all the way out to what is the network requirement, all the scale in scale out and scale up.”

Catch the full interview from theCUBE.

4. Setting new standards for the AI era

Standards play a crucial role in today’s rapidly evolving infrastructure landscape, extending far beyond memory and storage. Collaboration is essential, as the current boom in innovation makes it impossible for any one organization to handle everything alone, according to Amber Huffman, principal engineer at Google LLC.

Google’s Amber Huffman and Sandisk’s Cynthia Hsu talk with theCUBE.

“What standards bring us is [that] we can each work on what are we good at. Are we great at doing a memory component? Are we great at doing a solid state drive? Are we great at building a whole rack?” Huffman said.

Rack and cooling standards have become critical as AI drives new infrastructure demands. AI workloads are reshaping how flash is designed across the entire data pipeline and lifecycle, according to Cynthia Hsu, senior director of flash memory design at Sandisk Corp.

“For example, during training, our systems are learning from huge data sets. You need these high-performance [solid-state drives] for model checkpointing and caching, and then you need these high-capacity drives to act like fast data lakes,” Hsu said. “But then in data prep and ingestion, you need both the high performance and capacity to keep the [graphics processing units] fed.”

Watch the full segment from theCUBE.

5. Bridging AI, hardware and manufacturing precision

AI infrastructure has become one of the most dynamic areas in technology, where software engineering is moving closer to the hardware layer. Designing software-defined devices requires balancing hardware and software trade-offs to ensure seamless performance within real-world systems, according to Nitza Basoco, technology and market strategist in the semiconductor test division at Teradyne, Inc.

“I think that’s really changing how people are looking at it and defining how devices are created,” Basoco said.

Yield and manufacturability are critical factors in semiconductor production, determining whether innovations can scale efficiently and reliably. Foundries and packaging partners – such as outsourced semiconductor assembly and test companies – use test chips early in development to spot yield issues, according to Pam Fulton, principal engineer in Intel Foundry Services at Intel Corp.

“Part of the advanced packaging ecosystem that foundries and OSATs have been going through is really developing a lot of early yield indicators using things like test chips – or test vehicles we call them – in order to look at [intellectual properties] and look at packaging techniques and make sure, using our test methodologies, that we can actually get yield results before the product even comes to the manufacturing line,” Fulton said.

Check out theCUBE’s full interview.

Stay tuned for the full complete video playlist from SiliconANGLE’s and theCUBE’s coverage of theCUBE + NYSE Wired: GSA Series – Women in Leadership event.