Cisco Systems Inc. today announced its 8223 routing system, powered by its new Silicon One P200 chip — a new network system designed to unlock artificial intelligence’s potential through massive scale.

Earlier this year, Nvidia Corp. introduced the concept of “scale-across” architectures as AI is now hitting the limits of a single data center. A “unit of compute” was once a server then evolved into a rack and then the entire data center. Scale across enables multiple data centers to act as a single unit of compute, and Cisco designed the 8223 and P200 silicon for the specific rigors of this task.

The new chip sets a new high-water mark for networking with a whopping 51.2 terabits per second of full-duplex throughput. There are two models of the new router. Both are 3RU and have 64 800G ports.

The 8223-64EF uses OSFP optics while the 8223-64E uses QSFP. While both modules achieve the same total data rate, their key differences are in size, thermal management and backward compatibility. These distinctions influence their suitability for different network environments, such as high-density data centers versus telecom applications. Also, OSFP supports both Ethernet and Infiniband standards, while QSFP is used primarily in Ethernet networks.

Single data center AI infrastructure has reached its limits

Though the capacity of these routers may seem off the charts, AI is consuming network traffic at unprecedented rate. As AI models double in size every year, the infrastructure required to train them has ballooned. This has pushed hyperscalers past the point of being able to scale-up and scale-out, leaving the only path forward as scale-across. This scale-across migration is driving a massive increase in long-haul traffic.

On a pre-briefing, Cisco Senior Vice President Rakesh Chopra talked about this. He mentioned that a scale-across network needs approximately 14 times more bandwidth than the traditional wide-area network interconnect and could require up to 16,000 ports to deliver 13 petabits per second of bandwidth for a massive AI cluster.

Trying to achieve this with older modular chassis would require thousands of modular chassis, becoming prohibitively expensive, power-hungry and complex to manage. With scale-across, this can be done with only about 2,000 ports, which is a fraction of the previously estimated 16,000.

Deep buffer differentiator for Cisco

A key part of Cisco’s strategy is its use of deep buffers — a feature typically associated with traditional routers, not the shallow-buffered switches favored in internal AI clusters. This is arguably the most significant architectural point of divergence from competing approaches such as Nvidia Spectrum-XGS Ethernet. What’s interesting about this is that deep buffers have not been used for AI infrastructure as they are perceived to actually slow down AI workloads.

Deep buffers are thought to be detrimental to AI networking, particularly for distributed training workloads, because they cause high latency and jitter, which severely degrade the performance of AI models. The concept comes from the notion that with deep buffers, the buffers need to be repeatedly filled and then drained and that causes jitter in the transmission of data between GPUs.

Though deep buffers prevent packet loss during congestion (microbursts), which is good for throughput, the tradeoff is a phenomenon called bufferbloat. AI workloads, especially distributed training involving multiple GPUs, are highly sensitive to latency and synchronization issues.

To Cisco’s credit, it addressed this proactively in the analyst call and explained how it can overcome perceived limitations of deep buffers. Cisco’s argument is that it’s not the existence of deep buffers that causes the problem but rather congestion that causes them to fill in the first place. Chopra argues, “The problem is the fact that you’ve done a bad job of load balancing and avoiding congestion control.”

The other thing to realize is that even if the buffers are filling and draining that doesn’t affect job completion time as AI workloads are synchronous in nature. “AI workloads wait for the longest path through the network to complete which effects mean transmission time, not the maximum transmission time,” Chopra explained.

The introduction of deep buffers creates better reliability for long distance, scale across networks supporting AI workloads. Losing a single packet forces a massive rollback to a checkpoint, a process that is very expensive to do when AI training runs for months. The P200’s deep buffering capabilities are designed to absorb massive traffic surges from training, ensuring performance is maintained and power is not wasted on re-processing. Through good congestion management, Cisco can marry the benefits of deep buffering without the historical downsides.

Security and flexibility future-proof the AI fabric

Recognizing the criticality of the data moving across data centers, security is baked deep into the 8223. The system offers line-rate encryption using post-quantum resilient algorithms for key management, a level of future-proofing essential for multiyear AI training jobs. Furthermore, a Root of Trust is embedded in the silicon, guaranteeing integrity from manufacturing to deployment, safeguarding against physical tampering.

Also, Cisco is embracing operational flexibility. The 8223 is initially available for open-source SONiC deployments, targeting hyperscalers and large AI data center builders who often prefer open options. Support for IOS XR is coming shortly after, which will allow the platform to serve traditional Data Center Interconnect (DCI), core, and backbone WAN use cases, expanding the total addressable market significantly beyond the core AI-cloud customers.

The P200 chip will also be available in modular platforms and disaggregated chassis and will power the Cisco Nexus portfolio (running NX-OS) for the enterprise data center, ensuring the same foundational technology and architectural consistency across the entire AI ecosystem. This multifaceted deployment strategy positions Cisco to capture a significant portion of the well north of $10 billion TAM for networking equipment in the AI cloud sector.

It’s important to note that both Cisco and Nvidia now offer scale-across networking products with Cisco leveraging deep buffer and Nvidia with shallow buffers. Though industry watchers will want to pit one versus the other, the reality is the demand for AI networking is so great that both can succeed. Cisco’s approach is ideally suited for distributed AI interconnects where network resiliency is critical. Nvidia’s approach is better aligned with low latency scenarios where predictable, minimal latency is an absolute priority for fast training cycles.

AI has created a rising tide, and options are good for customers.

Zeus Kerravala is a principal analyst at ZK Research, a division of Kerravala Consulting. He wrote this article for SiliconANGLE.

Image: Cisco